How much GPU memory does Qwen2.5 7B need?
The 7.61B checkpoint has a 3.54 GiB INT4 weight floor. This page's one-sequence 32K planning target is 6.35 GiB after the exact 1.75 GiB KV cache and 20% runtime headroom.
Qwen2.5 / deployment worksheet
Compare Qwen2.5 7B, 32B, and 72B across INT4, INT8, and BF16—then include the exact grouped-query KV cache before choosing a GPU.
Open the editable 32B model →Quick answer / INT4 at 32K
These are capacity estimates—not throughput benchmarks. They use the official Qwen2.5 parameter and architecture counts, one concurrent sequence, an exact BF16 KV cache, and explicit headroom.
32K serving matrix
Planning target = (raw weight floor + one full 32K BF16 KV cache) × 1.20 runtime headroom. GPU examples reserve only 90% of listed VRAM.
Swipe the matrix horizontally →
| Model | Architecture | INT4 target | INT8 target | BF16 target |
|---|---|---|---|---|
| Qwen2.5 7B | 28L · 4 KVH · 128D | 6.35 GiB 1 × 16 GiB | 10.60 GiB 1 × 16 GiB | 19.11 GiB 1 × 24 GiB |
| Qwen2.5 32B | 64L · 8 KVH · 128D | 27.76 GiB 1 × 48 GiB | 45.92 GiB 1 × 80 GiB | 82.24 GiB 2 × 48 GiB |
| Qwen2.5 72B | 80L · 8 KVH · 128D | 52.62 GiB 2 × 48 GiB | 93.25 GiB 2 × 80 GiB | 174.50 GiB 3 × 80 GiB |
Quantized artifacts usually add scales, metadata, and some higher-precision modules, so an exact checkpoint can exceed the mathematical bit-per-parameter floor. Benchmark the artifact and serving runtime before reserving hardware.
Read the estimate
Capacity is not speed.
A model that fits can still miss the latency or throughput target.
Concurrency multiplies cache.
Every fully allocated sequence repeats the KV-cache budget.
Topology is real.
Multi-GPU capacity works only with supported sharding and enough interconnect bandwidth.
The 128K context trap
Qwen2.5 7B1.75 GiB at 32K → 7 GiB at 128K
Qwen2.5 32B8 GiB at 32K → 32 GiB at 128K
Qwen2.5 72B10 GiB at 32K → 40 GiB at 128K
The official model cards describe 128K support, while the published configuration uses 32,768 positions by default and documents YaRN for longer inputs. Treat the configured context, serving engine, and cache policy as deployment inputs—not a marketing constant.
Primary-source inputs
The page uses total parameter counts from the official model cards and layer, KV-head, and head-dimension values from the official configurations. It does not use a third-party VRAM table as an input.
Open the GPU memory calculator → Open the KV-cache calculator → Compare the Qwen3 family → Official Qwen2.5 7B model card → Official Qwen2.5 32B model card → Official Qwen2.5 72B model card → Official Qwen2.5 speed and memory benchmark →The 7.61B checkpoint has a 3.54 GiB INT4 weight floor. This page's one-sequence 32K planning target is 6.35 GiB after the exact 1.75 GiB KV cache and 20% runtime headroom.
The 32.5B checkpoint has a 15.13 GiB INT4 weight floor. Its 32K BF16 KV cache is 8 GiB, producing a 27.76 GiB planning target with 20% runtime headroom.
The 72.7B checkpoint has a 33.85 GiB INT4 weight floor. Its 32K BF16 KV cache is 10 GiB, producing a 52.62 GiB planning target with 20% runtime headroom.
KV-cache memory grows linearly with context. At one full BF16 cache, moving from 32K to 128K raises the 7B cache from 1.75 to 7 GiB, the 32B cache from 8 to 32 GiB, and the 72B cache from 10 to 40 GiB.
Infrastructure without the benchmark theatre
ResearchAudio turns model releases, hardware claims, and serving constraints into practical decisions for engineers and builders.